1. Field
The present invention relates to a lithographic apparatus and a device manufacturing method.
2. Related Art
A lithographic apparatus is a machine that applies a desired pattern onto a target portion of a substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs), flat panel displays, and other devices involving fine structures. In a conventional lithographic apparatus, a patterning device, which is alternatively referred to as a mask or a reticle, can be used to generate a circuit pattern corresponding to an individual layer of the IC (or other device), and this pattern can be imaged onto a target portion (e.g. comprising part of, one or several dies) on a substrate (e.g., a silicon wafer or glass plate) that has a layer of radiation-sensitive material (e.g., resist).
Instead of a mask, the patterning device can comprise an array of individually controllable elements, which generate the circuit pattern. Each individually controllable element can, by way of example, comprise a diffractive device arranged, such that addressed areas of a reflective surface reflect incident light as diffracted light, while unaddressed areas reflect incident light as undiffracted light. Using an appropriate spatial filter, the undiffracted light can be filtered out of the reflected beam, leaving only the diffracted light to reach the substrate.
In general, a single substrate will contain a network of adjacent target portions that are successively exposed. Known types of lithographic apparatus include steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion in one go, and scanners, in which each target portion is irradiated by scanning the pattern through the beam in a given direction (the “scanning”-direction), while synchronously scanning the substrate parallel or anti-parallel to this direction.
An array of individually controllable elements can be considered to be “dense” if a high proportion of the surface of the array comprises portions, which selectively reflect, diffract or transmit light. Alternatively, an array of individually controllable elements can be considered to be “sparse” if a significant proportion of the surface of the array comprises other structures, for example, drive electronics that do not selectively reflect, diffract or transmit light.
Sparse diffractive arrays, for example a grating light valve (GLV) from Silicon Light Machines of Sunnyvale, Calif., can comprise multiple cells (e.g. an array of about 256×1 cells or about 256×256 cells). Each cell can comprise a plurality of reflective ribbons that can be deformed relative to one another to form a diffraction grating. For example, the height of alternate ribbons can be controlled by drive electronics within the cell. Due to the different fabrication techniques involved in the construction of the ribbons and the drive electronics (e.g., CMOS for the drive electronics and MEMS for the ribbons) it may not be possible to fabricate the ribbons over the drive electronics. Consequently, the drive electronics can form up to about 70% or more of the area of each cell.
For an array having a large number of individually controllable elements, particularly an array having diffractive elements, the total area of the array (alternatively referred to as the die size or chip size) can be very large. It is easier to manufacture arrays having large diffractive elements in sparse arrays, due to the less stringent lithographic requirements. Again, this increases the total surface area of the array.
More cells in an array allows a greater lithographic throughput due to the larger surface area of the substrate that can be exposed in each scan of the lithographic apparatus. Alternatively, an array having a larger number of cells can be designed to have a greater resolution when exposing a single area of substrate. Both of these factors can result in a greater effective pixel throughput for the lithographic apparatus. Therefore, there is an increasing desire to increase the number of cells in the array for each lithographic apparatus.
However, there can be issues involved in increasing the surface area of an array of elements. The larger the surface area of the array, the greater the probability that the array will contain flaws, resulting in the array being unusable. The probability of an array containing a fatal flaw increases exponentially with the surface area of the array as a function of the number of flaws per unit area.
Additionally, in order to fabricate large arrays it may not be possible to expose the entire array in one pass, resulting in a requirement to use a number of separate exposures to fabricate different parts of the array. It is necessary to stitch the multiple optical fields or tiles together to expose the complete circuitry for the array. These additional processing steps can result in a lower throughput and additional cost (due to the larger number of masks and as a result of the reduced throughput) when fabricating an array of individually controllable elements. Furthermore, errors can be introduced when stitching together multiple optical fields, reducing the yield of correctly functioning arrays. A reduction in yield also increases the cost of fabricating large arrays of individually controllable elements.
Consequently, a trade off has to be made between the competing requirements for large cell size, sparse arrays having a large number of cells, and cost, fabrication throughput and yield.
Therefore, what is needed is a system and method for which a size of an effective array of individually controllable elements is increased more efficiently and effectively.